Title page for ETD etd-02092006-044244

Type of Document Dissertation
Author Chung, Woo Cheol
URN etd-02092006-044244
Title The Dual Use of Power Distribution Networks for Data Communications in High Speed Integrated Circuits
Degree PhD
Department Electrical and Computer Engineering
Advisory Committee
Advisor Name Title
Ha, Dong Sam Committee Chair
Armstrong, James R. Committee Member
Hsiao, Michael S. Committee Member
Mishra, Amitabh Committee Member
Reed, Jeffrey Hugh Committee Member
  • Integrated Circuits
  • Power Line Communications
  • Power Distribution Networks
  • Ultra Wideband
Date of Defense 2006-01-27
Availability unrestricted
This thesis investigates a new data communication method in high speed integrated circuits using power distribution networks (PDNs). The conventional purpose of PDNs in integrated circuits (ICs) is to deliver power to internal nodes of an IC while meeting a level of power integrity. As the power consumption increases for very large scale integration (VLSI) systems, the number of power/ground pins increases as well. In this thesis, we propose to use PDNs for dual purposes, delivery of power and one-/two-way data communications, which is highly beneficial for pin-limited high performance ICs. To this end, we investigate signaling methods for a microscopic communication channel. Impulse-based ultra wideband (UWB) signaling is selected due to its robustness to noise and wideband characteristics. Next, we study a planar structure IC package based on the cavity resonator model (CRM) as a communication channel. Impedance characteristics of a planar structure IC package and other relevant components of an IC are important, and they are investigated for data transmission over power distribution networks. Another important aspect of the study is data transmission and reception, which we investigate through simulations. Finally, we study one possible application for one way communications, massive parallel scan design, which greatly shortens the testing time at moderate overhead. The performance is measured with eye diagrams and bit error rates (BERs) under the presence of voltage drop, simultaneous switching noise, and thermal noise.
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