Title page for ETD etd-02292012-092806

Type of Document Master's Thesis
Author Malayattil, Sarosh Aravind
Author's Email Address saroshm@vt.edu
URN etd-02292012-092806
Title Design of a Multibus Data-Flow Processor Architecture
Degree Master of Science
Department Electrical and Computer Engineering
Advisory Committee
Advisor Name Title
Jones, Mark T. Committee Chair
Martin, Thomas L. Committee Member
Plassmann, Paul E. Committee Member
  • Automation Framework
  • Multibus
  • Electronic Textiles
Date of Defense 2012-02-17
Availability unrestricted
General purpose microcontrollers have been used as computational elements in various spheres

of technology. Because of the distinct requirements of specific application areas, however, general purpose microcontrollers are not always the best solution. There is a need for specialized processor architectures for specific application areas. This thesis discusses the design of such a specialized processor architecture targeted towards event driven sensor applications. This thesis presents an augmented multibus dataflow processor architecture and an automation framework suitable for executing a range of event driven applications in an energy efficient manner. The energy efficiency of the multibus processor architecture is demonstrated by

comparing the energy usage of the architecture with that of a PIC12F675 microcontroller.

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