Type of Document Master's Thesis Author Venkataramani, Muthuswamy Author's Email Address firstname.lastname@example.org URN etd-05062004-142557 Title Efficiency Improvement of WCDMA Base Station Transmitters using Class-F power amplifiers Degree Master of Science Department Electrical and Computer Engineering Advisory Committee
Advisor Name Title Bostian, Charles W. Committee Chair Raman, Sanjay Committee Member Sweeney, Dennis G. Committee Member Keywords
- harmonic balance
- Intermodulation distortion
- power added efficiency
- power amplifier
Date of Defense 2004-02-13 Availability unrestricted AbstractUniversal Mobile Telecommunications Systems (UMTS) is the preferred third generation (3G) communication standard for mobile communications and will provide worldwide coverage, a convenient software technology and very high data rate. The high data rate, especially, requires the use of bandwidth-efficient modulation schemes such as Quadrature Phase Shift Keying (QPSK). But modulation schemes such as QPSK need, in turn, a very linear power from the output of the transmitter power amplifier in order to meet the spectral requirements. A linear power amplifier, traditionally, has very low energy efficiency. Poor energy efficiency directly affects operational costs and causes thermal heating issues in base station transmitters. Thus the power amplifier designer is forced to trade-off between linearity and efficiency. As a result of this trade-off a Class-AB power amplifier is most often used in QPSK based systems. Class-AB power amplifiers provide acceptable linearity at efficiency values around 45-50% typically. This compromise is not a satisfactory solution but is inevitable while using traditional power amplifier design techniques.
This thesis details the use of a Class-F amplifier with carefully chosen bias points and harmonic traps to overcome this problem. Class-F amplifiers are usually considered as very high efficiency (80% or more power-added efficiency) amplifiers where the high efficiency is obtained through the use of harmonic traps (L-C filters or quarter-wavelength transmission lines), which provide suitable terminations (either open or short) for the harmonics generated. By doing this, a square wave drain voltage and a peaked half-sinusoidal drain current out-of-phase by 180º are produced. Since only a drain voltage or a drain current exists at any given time, the power dissipation is ideally zero resulting in 100% theoretical efficiency. These very high efficiency values are usually associated with poor linearity. However the linearity can be improved to meet the design standards but compromising on efficiency. Even after this is done, efficiencies are usually 10 to 15% greater than a traditional Class AB power amplifier with similar linearity performance. Thus efficiency can be improved without affecting linearity by the use of Class-F power amplifiers.
In order to verify this theory, a Class-AB and a Class-F power amplifier are designed using Motorola’s high voltage laterally diffused metal oxide semiconductor (LDMOS) transistor. The choice of bias points and the design of the harmonic traps are very critical for the Class-F performance and hence were designed after careful consideration. The designs were simulated on Agilent’s Advanced Design System (ADS) and the simulated results were compared for three different power levels namely, the peak power, 3 dB below peak power and 6 dB below peak power. At all of these power levels it was noted that the Class-F and Class-AB power amplifiers have very similar linearity performance whereas the Class-F power amplifiers show about 10% improvement in efficiency in comparison to the Class-AB power amplifiers.
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