Type of Document Master's Thesis Author Barnhart, William David URN etd-06232002-130956 Title Development of Nanoelectromechanical Resonators for RFIC Applications Degree Master of Engineering Department Electrical and Computer Engineering Advisory Committee
Advisor Name Title Raman, Sanjay Committee Chair Evoy, Stephane Committee Co-Chair Guido, Louis J. Committee Member Lu, Guo-Quan Committee Member Keywords
- Integrated Circuit
- E-Beam Lithography
- SOI Processing
Date of Defense 2002-06-14 Availability unrestricted AbstractOver the past decade there has been an explosion in the demand for wireless mobile personal communications systems (PCS), a trend that shows no signs of slowing down in the foreseeable future. This demand has created a greater need for low-cost, low-power, compact system solutions. As a result, "single-chip" implementations of wireless functions have received a significant amount of attention. A significant roadblock to complete integration of these functions is the requirement for high-Q resonators in RF filter and tank circuits. Current on-chip techniques being used to realize monolithic RF resonators based on planar inductors, capacitors and active circuits are accompanied by problems such as high loss, large chip area and high power consumption. An alternative to these on-chip solutions is the use of monolithically integrated electromechanical devices.
This thesis describes the modeling, fabrication and characterization of nanoelectromechanical (NEM) single crystal silicon resonators. The potential advantages associated with these devices are high-Q, small die area and low power consumption. The development of such devices compatible with modern integrated circuit fabrication techniques offers the possibility for integration of high performance RF filters and resonators onto a single RFIC chip. The advantageous characteristics of these resonators could lead to mobile PCS devices with lower cost and increased battery life.
The NEM resonator designs investigated in this work are fabricated using an electron-beam lithography based surface machining process in silicon-on-insulator technology. Various design, fabrication and testing issues are discussed. The feasibility of lateral capacitive actuation and detection in such structures is examined.
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