Title page for ETD etd-071399-153442

Type of Document Dissertation
Author Barlow III, Fred D
URN etd-071399-153442
Title Electronic Packaging Strategies for High Current DC to DC Converters
Degree PhD
Department Electrical and Computer Engineering
Advisory Committee
Advisor Name Title
Elshabini-Riad, Aicha A. Committee Chair
Besieris, Ioannis M. Committee Member
McGrath, James E. Committee Member
Scales, Wayne A. Committee Member
Sergent, Jerry E. Committee Member
  • DC/DC Converters
  • Electronic Packaging
  • High Current
Date of Defense 1999-06-14
Availability unrestricted
Current trends in electronics are toward the use of reduced

voltages. In the past, 5 V and higher voltages have been the standard,

however, currently, 3.3V and 2.5V circuits are becoming increasingly

common. While the operating voltage is decreasing, electronic

systems are becoming more complex. The net result is that in many,

cases, the current required by the next generation of electronics will

be far greater than in the past. These increased currents and low

voltages pose dramatic problems for designers not the least of which

is the effect of electronic packaging and circuit implementation on

the overall power supply performance.

In addition, for many applications, space and weight are at a

premium and converters are needed to power low voltage circuit

assemblies that are highly efficient, low in weight, and small in total

height and foot print.

This dissertation addresses these trends and needs through the

design, fabrication and evaluation of a 3.3V DC/DC converter.

Designs of 3.3V, 2.5V, and 1.5V are presented and evaluated while a 3.3V, 100 watt converter with a power density of 157 watts/in 3 has been fabricated

and evaluated in a miniature form. This converter utilizes a implementation

strategy developed by the author which was selected due to its ability to handle the

current levels required and its compact size.

Specific contributions of this work include:

* Analysis of the effects of packaging on low voltage high current converters in

order to provide a guideline for converter implementation. This analysis has been

performed for 3.3 V, 2.5 V, and 1.5 V designs, respectively.

* Development of high efficiency 2.5 V, 100 watt and 1.5 V, 75 watt designs based

on previously reported half bridge topologies.

* Development of a packaging strategy which allows the fabrication of low voltage

compact converters with high efficiency. A 3.3 V converter has been fabricated

and with the simulated data validated these experimental results.

For very low (less than 50 watts and / or less than 10 amps) and high power

levels (hundreds of amps or kilowatts), the implementation strategy is normally

clear; PCB/IMS, and DBC respectively. However, for applications in the middle

range of power or current level, the optimum implementation is often unclear. The

question that this work seeks to answer is under what conditions are different

implementation schemes most suitable.

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