Title page for ETD etd-07232012-025336

Type of Document Master's Thesis
Author Koh, Hyunsoo
Author's Email Address hyunsoo@vt.edu
URN etd-07232012-025336
Title Modeling and Control of Single Switch Bridgeless SEPIC PFC Converter
Degree Master of Science
Department Electrical and Computer Engineering
Advisory Committee
Advisor Name Title
Lai, Jih-Sheng Jason Committee Chair
Meehan, Kathleen Committee Member
Yu, Wensong Committee Member
  • LED application
  • Single-phase
  • Digital Control
  • Analog Control
  • Power Factor Correction
  • SEPIC PFC Converter
  • Bridgeless PFC Converter
Date of Defense 2012-07-13
Availability unrestricted
Due to increasing concerns on the power quality, power factor correction (PFC) has become an important issue in light-emitting diode (LED) lighting applications. A boost converter is one of the most well-known PFC topologies, due to its simple circuitry, simple control scheme and small number of passive components. Even though a boost converter is recognized as a typical PFC converter, its output voltage must be higher than its input voltage. This feature is disadvantageous because the device requires an additional buck-stage for LED lighting systems.

As an alternative to the boost converter, a single-ended primary-inductor converter (SEPIC) allows output voltage to be lower or higher than the input voltage. Thus, the SEPIC converter is gaining popularity as a LED driver because it does not require additional power conversion stage. However, designing a controller to meet stability requirements and international standards is quite challenging for SEPIC converters. Additionally, if the digital controller is adopted for its built-in communication features, creating a digitally controlled SEPIC converter would be even more challenging.

This thesis focuses on the state-space averaging modeling of the SEPIC PFC converter and the design of controllers based on both analog and digital controls with precise modeling. The proposed SEPIC converter incorporates RC damping circuits to avoid the instability, and

thus the entire SEPIC converter becomes a 5th order system. Such a high-order system model was derived mathematically and verified with circuit simulator modeling. After verification of the circuit model, the controller was designed with analog transfer functions and converted to and the discrete domain for digital controller implementation. A 150-W single-switch bridgeless SEPIC PFC converter prototype was built accordingly to verify the design. In addition to the current loop controller design for stability, a feed-forward compensator for is introduced and derived for better waveform quality. Simulation results and experiment results are also presented to verify the complete controller with feed-forward compensation. The Texas Instruments (TI) digital signal processor (DSP) TMS320F28335 was adopted for digital controller implementation. For comparison purpose, the TI UC3854 controller was implemented to verify the analog controller design results.

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