Title page for ETD etd-08042000-17470052

Type of Document Dissertation
Author Khalaf, Yaser A.
URN etd-08042000-17470052
Title Systematic Optimization Technique for MESFET Modeling
Degree PhD
Department Electrical and Computer Engineering
Advisory Committee
Advisor Name Title
Riad, Sedki Mohamed Committee Chair
Besieris, Ioannis M. Committee Member
El-Ghazaly, Samir M. Committee Member
Elshabini-Riad, Aicha A. Committee Member
Scales, Wayne A. Committee Member
  • Optimization
  • semiconductor
  • Small-Signal model
  • Large-Signal model
  • Transistor
  • Modeling
Date of Defense 2000-07-24
Availability unrestricted

Accurate small and large-signal models of metal-semiconductor field effect transistor (MESFET) devices are essential in all modern microwave and millimeter wave applications. Those models are used for robust designs and fabrication development. The sophistication of modern communication systems urged the need of monolithic microwave integrated circuits (MMICs), which consists of many MESFETs on the same chip. As the chip density increases, the need of accurate MESFET models becomes more pronounced.

In this study, a new technique has been developed to extract a 15-element small signal model of MESFET devices. This technique implies the use of three sets of S-parameter measurements at different bias conditions. The technique consists of two major steps; in the first step, some of the bias-independent extrinsic parameters are estimated in preparation for the second step. In the second step, all other parameters should be extracted at the bias point of interest. This technique shows reliable results. Unlike other optimization techniques, our proposed technique shows insensitivity to the unavoidable measurement errors over any frequency range. It shows a unique solution for all parameter values. This technique has been tested on S-parameters of a hypothetical device model and compared with other optimization-based extraction techniques. Moreover, it has been also applied to GaAsTEK 0.8x300 μm2 MESFETs to extract the model parameters at different bias voltages. The study reveals accurate and consistent results among the similar devices on the same wafer. Some thermal characteristics of the small-signal parameters are discussed. The parameters are extracted from measurements at three temperatures for two similar devices on the same wafer. The thermal results of the two devices demonstrate consistent results, which assure the preciseness, and robustness of our proposed technique.

In addition, the relation between the small-signal model parameters and the large signal model parameters is also presented. The parameters of an empirical model for the drain-source current are extracted from the dc measurements along with the small-signal transconductance and output conductance. The large-signal model results for a GaAsTEK 0.8x300 μm2 MESFET are introduced.

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