Title page for ETD etd-08312010-174033

Type of Document Master's Thesis
Author Morozov, Sergey Victorovich
Author's Email Address morozovs@vt.edu
URN etd-08312010-174033
Title Elliptic Curve Cryptography on Heterogeneous Multicore Platform
Degree Master of Science
Department Electrical and Computer Engineering
Advisory Committee
Advisor Name Title
Schaumont, Patrick Robert Committee Chair
Athanas, Peter M. Committee Member
Hsiao, Michael S. Committee Member
  • Binary Field
  • DSP
  • ARM
  • Cryptography
  • Elliptic Curve
  • Prime Field
  • Multiprocessor
  • Point Multiplication
  • Multicore
Date of Defense 2010-08-31
Availability unrestricted
Elliptic curve cryptography (ECC) is becoming the algorithm of choice for digital signature generation and authentication in embedded context. However, performance of ECC and the underlying modular arithmetic on embedded processors remains a concern. At the same time, more complex system-on-chip platforms with multiple heterogeneous cores are commonly available in mobile phones and other embedded devices. In this work we investigate the design space for ECC on TI's OMAP 3530 platform, with a focus of utilizing the on-chip DSP core to improve the performance and efficiency of ECC point multiplication on the target platform. We examine multiple aspects of ECC and heterogeneous design such as algorithm-level choices for elliptic curve operations and the effect of interprocessor communication overhead on the design partitioning. We observe how the limitations of the platform constrict the design space of ECC. However, by closely studying the platform and efficiently partitioning the design between the general purpose ARM core and the DSP, we demonstrate a significant speed-up of the resulting ECC implementation. Our system focused approach allows us to accurately measure the performance and power profiles of the resulting implementation. We conclude that heterogeneous multiprocessor design can significantly improve the performance and power consumption of ECC operations, but that the integration cost and the overhead of interprocessor communication cannot be ignored in any actual system.
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