Title page for ETD etd-09082002-125724

Type of Document Master's Thesis
Author Pang, Ying-Feng
URN etd-09082002-125724
Title Integrated Thermal Design and Optimization Study for Active Integrated Power Electronic Modules (IPEMs)
Degree Master of Science
Department Mechanical Engineering
Advisory Committee
Advisor Name Title
Scott, Elaine P. Committee Chair
Thole, Karen A. Committee Co-Chair
Bohn, Jan Helge Committee Member
  • power electronics cooling
  • integrated design optimizations
  • thermal management
Date of Defense 2002-08-26
Availability unrestricted
Thermal management is one of many critical tasks in the design of power electronic systems. It has become increasingly important as a result of the introduction of high power density and integrated modules. It has also been realized that higher temperatures do affect reliability due to a variety of physical failure mechanisms that involve thermal stresses and material degradation. Therefore, it is important to consider temperature as design parameter in developing power electronic modules.

The NSF Center for Power Electronics System (CPES) at Virginia Tech previously developed a first generation (Gen-I) active Integrated Power Electronics Module (IPEM). This module represents CPES's approach to design a standard power electronic module with low labor and material costs and improved reliability compared to industrial Intelligent Power Modules (IPM). A preliminary Generation II (Gen-II.A) active IPEM was built using embedded power technology, which removes the wire bonds from the Gen-I IPEM. In this module, the three primary heat-generating devices are placed on a direct bonded copper substrate in a multi-chip module format.

The overall goal of this research effort was to optimize the thermal performance of this Gen-II.A IPEM. To achieve this goal, a detailed three-dimensional active IPEM was modeled using the thermal-fluid analysis program ESC in I-DEAS to study the thermal performance of the Gen-II.A IPEM. Several design variables including the ceramic material, the ceramic thickness, and the thickness of the heat spreader were modeled to optimize IPEM geometric design and to improve the thermal performance while reducing the footprint. Input variables such as power loss and interface material thicknesses were studied in a sensitivity and uncertainty analysis. Other design constraints such as electrical design and packaging technology were also considered in the thermal optimization of the design.

A new active IPEM design named Gen-II.C was achieved with reduced-size and improved thermal and electrical performance. The success of the new design will enable the replacement of discrete components in a front-end DC/DC converter by this standard module with the best thermal and electrical performance. Future improvements can be achieved by replacing the current silicon chip with a higher thermal-conductivity material, such as silicon carbide, as the power density increases, and by, exploring other possible cooling techniques.

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