Title page for ETD etd-10202005-102819

Type of Document Dissertation
Author Ely, Kevin Jon
URN etd-10202005-102819
Title Piezoelectric effects in GaAs MESFET's
Degree PhD
Department Materials Engineering Science
Advisory Committee
Advisor Name Title
Hendricks, Robert W. Committee Chair
Dillard, John G. Committee Member
Drinkwine, Monte Committee Member
Elshabini-Riad, Aicha A. Committee Member
Zallen, Richard H. Committee Member
  • Field-effect transistors
  • Gallium arsenide semiconductors.
  • Metal oxide semiconductors
  • Piezoelectricity.
Date of Defense 1993-06-05
Availability restricted

Gallium arsenide MESFETS require protective passivation at several steps in their fabrication. A common film used for device passivation is silicon nitride. This passivation film is deposited on gallium arsenide substrates by chemical vapor deposition techniques and possesses high intrinsic stress. The stresses arise from the difference in the gallium arsenide and silicon nitride material properties, such as coefficient of expansion, density, modulus, and deposition temperature. The stress has been shown to cause electrical performance shifts in GaAs MESFET structures due to the piezoelectric nature of the gallium arsenide lattice.

This work develops a framework of mathematical models and experimental techniques by which the intrinsic stresses in the film and the GaAs substrate can be evaluated. Specifically, this work details the stress field and the electrical performance shifts in fully planarized self aligned gate GaAs MESFETS. The devices were 10 micron gate periphery FET devices with a 0.4 micron etched gate length. The test devices included both enhancement mode and depletion mode structures. The major contributors to the stress in GaAs devices was found to be the intrinsic stress effects of the silicon nitride passivation film. An externally applied stress, such as that applied to a package base that a typical GaAs device would be mounted into for actual service, was found to be insufficient to cause significant shifts in the device performance. The package body effectively reduces the transfer of stress to the device body and thereby minimizes the piezoelectric effect. The intrinsic stress effects are due to the deposition of the film itself. This intrinsic stress was found to have a significant effect on the device electrical characteristics. The stress was found to permanently shift the threshold voltage and current in 10 micron self aligned gate MESFETS. The shift was measured at 26 millivolts per 100 MPa film stress for depletion mode devices and 23 millivolts per 100 MPa for enhancement mode devices. For the maximum measured biaxial stress of -0.54 MPa in the gallium arsenide, the total measured shift was 140 millivolts. The level of shift is similar to that reported by earlier researchers. This piezoelectric shift has been modeled, with model predictions within 50/0 of the experimental values for the DFET devices and 11 % for the EFET devices.

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