Title page for ETD etd-12192011-094002


Type of Document Dissertation
Author Aguayo Gonzalez, Carlos Roberto
Author's Email Address caguayog@vt.edu
URN etd-12192011-094002
Title Power Fingerprinting for Integrity Assessment of Embedded Systems
Degree PhD
Department Electrical and Computer Engineering
Advisory Committee
Advisor Name Title
Reed, Jeffrey Hugh Committee Chair
Bostian, Charles W. Committee Member
Edwards, Stephen H. Committee Member
Park, Jung-Min Jerry Committee Member
Tranter, William H. Committee Member
Keywords
  • embedded systems
  • pattern recognition
  • instrussion detection
  • Power Fingerprinting
  • integrity assessment
Date of Defense 2011-12-05
Availability unrestricted
Abstract
This dissertation introduces Power Fingerprinting (PFP), a novel technique for assessing the execution integrity of embedded devices. A PFP monitor is an external device that captures the dynamic power consumption of a processor using fine-grained measurements at the clock-cycle level and applies anomaly detection techniques to determine whether the integrity of the system has been compromised. PFP uses a set of trusted signatures from the target code that are extracted during a pre-characterization process. PFP provides significant visibility into the internal execution status, making it extremely robust against evasion. Because of its independence and physical separation, PFP prevents attacks on the monitor itself and introduces minimal overhead on platforms with resource constraints. Due to its anomaly detection operation, PFP is effective against unknown (zero-day) attacks.

This dissertation demonstrates the feasibility of PFP on different platforms with different configurations and architectural complexities. Experimental results demonstrate the feasibility of PFP in a basic deterministic embedded platform for radio applications in two different areas: security and regulatory certification. For more complex, non-deterministic platforms, this works presents feasibility results for monitoring the execution integrity of complex software on a high-performance Android platform, including the ability to detect a real privilege escalation attack. In addition, the dissertation develops several general techniques to implement and integrate PFP into embedded platforms such as a general monitoring architecture, a methodology to characterize software modules and extract signatures, and an approach to perform board characterization and improve monitoring sensitivity.

Files
  Filename       Size       Approximate Download Time (Hours:Minutes:Seconds) 
 
 28.8 Modem   56K Modem   ISDN (64 Kb)   ISDN (128 Kb)   Higher-speed Access 
  Aguayo_CR_D_2011.pdf 2.00 Mb 00:09:14 00:04:45 00:04:09 00:02:04 00:00:10
  Aguayo_CR_D_2011_Copyright.pdf 634.80 Kb 00:02:56 00:01:30 00:01:19 00:00:39 00:00:03

Browse All Available ETDs by ( Author | Department )

dla home
etds imagebase journals news ereserve special collections
virgnia tech home contact dla university libraries

If you have questions or technical problems, please Contact DLA.